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--- gtkwave_simulation_for_ice [2019/09/11 08:48]
210.18.207.206
+++ gtkwave_simulation_for_ice [2021/02/02 01:24] (current)
@@ Line 1: / Line 1: @@
-====== FPGA Verilog simulation using GTKWave on the iCE-feather ======
+====== FPGA Verilog simulation using GTKWave on the iCE40-feather ======
 One of the nice things about working with FPGAs and Verilog is the array of open source tools and development boards that are available.
-For this article I'll be using the [[https://github.com/joshajohnson/iCE40-feather|iCE-feather]] development board by Josh Johnson which is based on the [[https://github.com/icebreaker-fpga/icebreaker-examples|ICEBreaker]] [[https://github.com/icebreaker-fpga/icebreaker|board]], but the simulation set up should be the same for many boards.
+For this article I'll be using the [[https://github.com/joshajohnson/iCE40-feather|iCE40-feather]] development board by Josh Johnson which is based on the [[http://www.latticesemi.com/-/media/LatticeSemi/Documents/UserManuals/EI/FPGAUG0200110.ashx?document_id=51987|Lattice iCE40 UltraPlus Breakout Board]], but the simulation set up should be the same for many boards.
-If you are using an iCE-feather, you can follow the [[https://github.com/joshajohnson/WTFpga/blob/master/install.md|set up instructions]] to get the icestorm toolchain installed, and get drivers working for this FTDI based board.
+If you are using an iCE40-feather, you can follow the [[https://github.com/joshajohnson/WTFpga/blob/master/install.md|set up instructions]] to get the icestorm toolchain installed, and get drivers working for this FTDI based board.
 Our aim is to take a verilog file, a testbench and simulate it using Icarus Verilog / GTKWave.
@@ Line 51: / Line 51: @@
 </code>
-Nice and simple, blink the red LED on the iCE-feather board after several thousand clock cycles.
+Nice and simple, blink the green LED on the iCE40-feather board after several thousand clock cycles.
 Now a testbench file, create a ''blink_tb.v'' file in our project folder:
@@ Line 75: / Line 75: @@
   // Dump wave
-	initial begin
+  initial
-		$dumpfile("blink_tb.lxt");
+    begin
-		$dumpvars(0,blink_tb);
+      $dumpfile("blink_tb.lxt");
-	end
+      $dumpvars(0,blink_tb);
+    end
   initial
@@ Line 119: / Line 120: @@
     gtkwave sim/blink_tb.lxt
 Here's the exciting bit. GTKWave will open up and load the simulation dump. But as yet, no signals have been chosen to visualise:
+{{ :wiki:gtkwave-loaded.png?nolink |}}
+Drag the ''clk[0]'' and ''nLED_GRN[0]'' signals into the ''Waves'' pane and your waveforms will display!
+{{ :wiki:gtkwave-with-signals.png?nolink |}}
+The wave setup is lost if you exit GTKWave. But you can save a config so that these signals are chosen next time you recompile the code. Select ''File'' > ''Write Save File As''.
+{{ :wiki:gtkwave-save-config.png?nolink |}}
+Save the file into the ''sim'' folder as: ''gtkwaveConfig.gtkw''
+Now close GTKWave. If we change the ''gtkwave'' command next time to:
+    gtkwave sim/blink_tb.lxt sim/gtkwaveConfig.gtkw
+...the signals you set previously will be shown again.
+===== Automatic Simulation Steps with a Makefile =====
+It would be cumbersome to type all those commands each time you made a change to your verilog code to display your simulation. Thankfully a makefile can make like so much easier.
+You can [[https://github.com/joshajohnson/WTFpga/blob/master/blink/Makefile|pinch a really nice one]] from Josh Johnson's version of the WTFpga course.
+The main piece of interest from the makefile is this:
+<code makefile>
+simulate:
+	iverilog -Wall -o sim/$(PROJ)_tb $(PROJ)_tb.v
+	vvp sim/$(PROJ)_tb -lxt2
+	mv $(PROJ)_tb.lxt sim/$(PROJ)_tb.lxt
+	gtkwave sim/$(PROJ)_tb.lxt sim/gtkwaveConfig.gtkw
+</code>
+Copy the Makefile into the root of your project folder.
+Now you can execute everything and see your simulation in one step with:
+    make simulate
+And that's it. Enjoy!

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