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pic16f1455_oscillators [2019/10/06 10:26] 60.240.96.191 [The delay function] |
pic16f1455_oscillators [2019/10/06 10:54] 60.240.96.191 [External Oscillators] |
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The datasheet does not list what the default for clock division is when resetting a PIC. However, the default in the configuration bits is shown as: ''CLKDIV6'' (using the MPLAB X IDE). Which means to divide the CPU clock by six. Or... make the CPU a sixth the normal speed. | The datasheet does not list what the default for clock division is when resetting a PIC. However, the default in the configuration bits is shown as: ''CLKDIV6'' (using the MPLAB X IDE). Which means to divide the CPU clock by six. Or... make the CPU a sixth the normal speed. | ||
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+ | And this is why the interval was not quite correct when we were setting the 62.5kHz frequency in the previous section. It was because there was some CLKDIV dividing set. | ||
===== Low Frequency Internal Oscillator (LFINTOSC) ===== | ===== Low Frequency Internal Oscillator (LFINTOSC) ===== | ||
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#define _XTAL_FREQ 17664000UL //17.664MHz | #define _XTAL_FREQ 17664000UL //17.664MHz | ||
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+ | Ensure the PLL is off to ensure good timing: | ||
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+ | #pragma config PLLEN = 0 //Turn off PLL | ||
And finally, the only ''OSCCON'' register setting you need is: | And finally, the only ''OSCCON'' register setting you need is: |